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742a50dafd
* trellis: init 2018.08.01 * trellis: move boost to buildInputs * trellis: remove leftover debug clause
50 lines
1.3 KiB
Nix
50 lines
1.3 KiB
Nix
{ stdenv, fetchFromGitHub, python3, cmake, boost }:
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let
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trellisdb = fetchFromGitHub {
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owner = "SymbiFlow";
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repo = "prjtrellis-db";
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rev = "06b429ddb7fd8ec1e3f2b35de2e94b4853cf2835";
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sha256 = "07bsgw5x3gq0jcn9j4g7q9xvibvz6j2arjnvgyrxnrg30ri9q173";
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};
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in
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stdenv.mkDerivation rec {
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name = "trellis-${version}";
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version = "2018.08.01";
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buildInputs = [
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(boost.override { python = python3; enablePython = true; })
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];
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nativeBuildInputs = [
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cmake python3
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];
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src = fetchFromGitHub {
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owner = "SymbiFlow";
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repo = "prjtrellis";
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rev = "fff9532fe59bf9e38b44f029ce4a06c607a9ee78";
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sha256 = "0ycw9fjf6428sf5x8x5szn8fha79610nf7nn8kmibgmz9868yv30";
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};
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preConfigure = ''
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source environment.sh
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cp -RT "${trellisdb}" database
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cd libtrellis
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'';
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meta = {
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description = "Documentation and tools for Lattice ECP5 FPGAs";
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longDescription = ''
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Project Trellis documents the Lattice ECP5 architecture
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to enable development of open-source tools. Its goal is
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to provide sufficient information to develop a free and
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open Verilog to bitstream toolchain for these devices.
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'';
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homepage = https://github.com/SymbiFlow/prjtrellis;
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license = stdenv.lib.licenses.isc;
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maintainers = with stdenv.lib.maintainers; [ q3k ];
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platforms = stdenv.lib.platforms.linux;
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};
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}
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