alioth/nixpkgs
3
0
Fork 0
forked from mirrors/nixpkgs
Code Releases Activity

trellis: 2021.07.06 -> 2021-09-01

Browse source 
I also cleaned up some unnecessary parts.
This commit is contained in:
Las Safin 2021-09-02 14:14:06 +00:00 committed by Austin Seipp
parent a51aa6523b
commit 4ebe496bad
1 changed files with 16 additions and 22 deletions

38
pkgs/development/embedded/fpga/trellis/default.nix
View file

@ -1,30 +1,27 @@
{ lib, stdenv, fetchFromGitHub
, python3, boost
, cmake
}:
stdenv.mkDerivation rec {
pname = "trellis";
version = "2021.07.06";
{ lib, stdenv, fetchFromGitHub, python3, boost, cmake }:
let
rev = "03e0070f263fbe31c247de61d259544722786210";
# git describe --tags
realVersion = with lib; with builtins;
"1.0-482-g${substring 0 7 (elemAt srcs 0).rev}";
realVersion = "1.0-532-g${builtins.substring 0 7 rev}";
in stdenv.mkDerivation rec {
pname = "trellis";
version = "2021-09-01";
srcs = [
(fetchFromGitHub {
owner = "YosysHQ";
repo = "prjtrellis";
rev = "dff1cbcb1bd30de7e96f8a059f2e19be1bb2e44d";
sha256 = "1gbrka9gqn124shx448aivbgywyp30zyjwfazr7v49lhrl7d46lb";
inherit rev;
sha256 = "joQMsjVj8d3M3IaqOkfVQ1I5qPDM8HHJiye+Ak8f3dg=";
name = "trellis";
})
(fetchFromGitHub {
owner = "YosysHQ";
repo = "prjtrellis-db";
rev = "0ee729d20eaf9f1e0f1d657bc6452e3ffe6a0d63";
sha256 = "0069c98bb4wilxz21snwc39yy0rm7ffma179djyz57d99p0vcfkq";
rev = "fdf4bf275a7402654bc643db537173e2fbc86103";
sha256 = "eDq2wU2pnfK9bOkEVZ07NQPv02Dc6iB+p5GTtVBiyQA=";
name = "trellis-database";
})
];
@ -34,14 +31,11 @@ stdenv.mkDerivation rec {
nativeBuildInputs = [ cmake python3 ];
cmakeFlags = [
"-DCURRENT_GIT_VERSION=${realVersion}"
# TODO: should this be in stdenv instead?
"-DCMAKE_INSTALL_DATADIR=${placeholder "out"}/share"
];
preConfigure = with builtins; ''
rmdir database && ln -sfv ${elemAt srcs 1} ./database
preConfigure = ''
rmdir database && ln -sfv ${builtins.elemAt srcs 1} ./database
source environment.sh
cd libtrellis
'';
@ -53,9 +47,9 @@ stdenv.mkDerivation rec {
to provide sufficient information to develop a free and
open Verilog to bitstream toolchain for these devices.
'';
homepage = "https://github.com/SymbiFlow/prjtrellis";
license = lib.licenses.isc;
homepage = "https://github.com/YosysHQ/prjtrellis";
license = licenses.isc;
maintainers = with maintainers; [ q3k thoughtpolice emily ];
platforms = lib.platforms.all;
platforms = platforms.all;
};
}